[X86] Support EVEX compression for EGPR #77202
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@llvm/pr-subscribers-backend-x86 Author: Shengchen Kan (KanRobert) ChangesPromoted instruction (EVEX) -> pre-promotion instruction (legacy/VEX) Full diff: https://github.com/llvm/llvm-project/pull/77202.diff 1 Files Affected:
diff --git a/llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp b/llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
index b03bcb6bc26b30..c519c07b243c24 100644
--- a/llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
+++ b/llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
@@ -167,12 +167,16 @@ void X86CompressEVEXTablesEmitter::run(raw_ostream &OS) {
for (const CodeGenInstruction *Inst : PreCompressionInsts) {
const Record *Rec = Inst->TheDef;
uint8_t Opcode =
- byteFromBitsInit(Inst->TheDef->getValueAsBitsInit("Opcode"));
+ byteFromBitsInit(Rec->getValueAsBitsInit("Opcode"));
+ StringRef Name = Rec->getName();
const CodeGenInstruction *NewInst = nullptr;
- if (ManualMap.find(Rec->getName()) != ManualMap.end()) {
+ if (ManualMap.find(Name) != ManualMap.end()) {
Record *NewRec = Records.getDef(ManualMap.at(Rec->getName()));
assert(NewRec && "Instruction not found!");
NewInst = &Target.getInstruction(NewRec);
+ } else if (Name.ends_with("_EVEX")) {
+ if (auto *NewRec = Records.getDef(Name.drop_back(5)))
+ NewInst = &Target.getInstruction(NewRec);
} else {
// For each pre-compression instruction look for a match in the appropriate
// vector (instructions with the same opcode) using function object
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✅ With the latest revision this PR passed the C/C++ code formatter. |
KanRobert
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KanRobert
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| @@ -29,8 +29,10 @@ class X86Subtarget; | |||
| namespace X86 { | |||
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| enum AsmComments { | |||
| // For instr that was compressed from EVEX to LEGACY. | |||
| AC_EVEX_2_LEGACY = MachineInstr::TAsmComments, | |||
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Why we need to associate with this value? Will it be a problem if there's new Flag added after MachineInstr::TAsmComments?
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enum CommentFlag {
ReloadReuse = 0x1, // higher bits are reserved for target dep comments.
NoSchedComment = 0x2,
TAsmComments = 0x4 // Target Asm comments should start from this value.
};
It's documented at llvm/include/llvm/CodeGen/MachineInstr.h. T is short for target and TAsmComments should always be the last value here.
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Thanks @XinWang10 ! |
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This patch is a straightfoward change based on the design in #77202. It does not have any effect since we haven't supported compressing ND to non-ND in X86CompressEVEX.cpp.
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Compress promoted instruction (EVEX) to pre-promotion instruction (legacy/VEX) when R16-R31 is not used. Alternative of llvm#77065
justinfargnoli
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This patch is a straightfoward change based on the design in llvm#77202. It does not have any effect since we haven't supported compressing ND to non-ND in X86CompressEVEX.cpp.
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Compress promoted instruction (EVEX) to pre-promotion instruction (legacy/VEX) when R16-R31 is not used.
Alternative of #77065